Daniel S. Berger
Senior Researcher
CXL Research
I have a deep interest in the Compute Express Link (CXL) open industry standard, especially for connecting memory devices. I am actively working on research and development.
Recent papers on CXL:
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- Managing Memory Tiers with CXL in Virtualized Environments (just accepted)
Yuhong Zhong, Daniel S. Berger, Carl Waldspurger, Ishwar Agarwal, Rajat Agarwal, Frank Hady, Karthik Kumar, Mark D. Hill, Mosharaf Chowdhury, Asaf Cidon
USENIX OSDI 2024 - Designing Cloud Servers for Lower Carbon (just accepted)
Jaylen Wang, Daniel S. Berger, Fiodar Kazhamiaka, Celine Irvene, Chaojie Zhang, Esha Choukse, Kali Frost, Rodrigo Fonseca, Brijesh Warrier, Chetan Bansal, Jonathan Stern, Ricardo Bianchini, Akshitha Sriraman
ISCA 2024 - An Introduction to the Compute Express Link (CXL) Interconnect
Debendra Das Sharma, Robert Blankenship, Daniel S. Berger
ACM Computing Surveys, May 2024 - Design Tradeoffs in CXL-Based Memory Pools for Public Cloud Platforms
Daniel S. Berger, Huaicheng Li, Pantea Zardoshti, Monish Shah, Samir Rajadnya, Scott Lee, Lisa Hsu, Ishwar Agarwal, Mark D. Hill, Ricardo Bianchini
IEEE Micro, February 2023 - Pond: CXL-Based Memory Pooling Systems for Cloud Platforms
Huaicheng Li, Daniel S. Berger, Stanko Novakovic, Lisa Hsu, Dan Ernst, Pantea Zardoshti, Monish Shah, Samir Rajadnya, Scott Lee, Ishwar Agarwal, Mark D. Hill, Marcus Fontoura, Ricardo Bianchini
ASPLOS 2023. Distinguished Paper Award.
- Managing Memory Tiers with CXL in Virtualized Environments (just accepted)